Table of Contents

Name

bliffc2 - blif to fc2 file processor - Version v1_3

Syntax

bliffc2 [options] [options]file[.blif]

Description

The bliffc2 tool is a blif to fc2 file processor. The tool accepts in input blif files obtained from the Esterel compiler, but also any blif description accepted by the TiGeR system. The tool can basically generate the entire FSM automaton or a reduced form of it. Reduction functions are based on a notion of state equivalence called bisimulation, identifying states with same behavior capabilities and reaching equivalent states for a given set of behaviors (here behaviors are predicates over the input/output signal events occurring during a transition). We provide over this a hiding mechanism allowing to forget about some input/output signal when considering state behaviors. Typically, if we let s1, s2, t1 and t2 be states such that (s1, ?I.!O, s2), (s1, #I.!O, s2), (t1, !O, t2) belong to the transition relation and if (s2,t2) are equivalent, then s1 and t1 are equivalent. (Here ?I means "test the signal I as present or as 1", #I "test I as absent or as 0", !O "emit the signal O"). The FSM is implicitly represented and symbolically manipulated using Binary Decision Diagrams (BDDs). The resulting FSM is explicitly generated in the Fc2 format. So, it can be graphically explored using the graphical tool Atg (http://www.inria.fr/meije/verification). FSMs are represented symbolically with BDDs using the TiGeR system data structures and libraries.

The blif file name describing the FSM is given through the command line argument. Another blif file may be given with a specific option (see below). It should be a file defining a set of relations over the input signals of the FSM defining an input care set. It is given as a combinational circuit whose output are the valid inputs of the FSM. Typically, this file may be generated by the Esterel language compiler when relations are specified at the program source level. The list of input and output signals to hide from observation is also given through the command line with an option specified below.

Options

-reach
computes the FSM reachable states. Prints out size figures (number of reachable states and the size of the BDD representing them).
-reduce
computes the (symbolic) bisimulation partition over the FSM's states.
-[i|o][see|hide] { [sig1 [sig2 ...]...] }
Declares a list of signal to keep visible (so any other signal is to hide) or to hide (any other remain visible). The list contains input (resp. output) signals if the option starts with `i' (resp. `o'). The signal list is taken into account in the reduction algorithm and in the result generation, i.e, all signals declared to be hidden are not considered when comparing state behaviors and do not appear anymore in the FSM. An empty list must have the curly braces, while they can be omitted for a list with a single element. In case the user declare two lists of hidden and visible inputs in the same command line, an error occur, and same for outputs.
-rel relation_file[.blif]
Specify the name of a blif file defining input relations to take into account when building the FSM.

The following options can be added to the preceding ones:

-B <name>
Declares name to be a basename for the fc2 file to generate. Extension ".fc2" is added automatically.
-v
Verbose mode. Tell what it is doing (Default is quiet).
-help
Display a brief description of the command line arguments on standard output. All other options are ignored.

All the described options can appear in any order. Warnings appear when incompatible or unknown options are specified.

Default

The command, without option just parses the given blif file and build the underlying FSM.

Diagnostics

The command returns with exit code 0 if (and only if) no error was detected during the treatments.

Various error or warning messages indicate parsing errors, incompatible or redundant options, or error related to file handling.

Bugs

Should be sent to Amar.Bouali@sophia.inria.fr.

See Also

Our WWW site, pages: http://www.inria.fr/meije/verification/esterel
http://www.inria.fr/meije/verification
http://www.inria.fr/meije/esterel

Identification

Author: Amar Bouali, ( Amar.Bouali@sophia.inria.fr )
Copyright INRIA 1997.
$Revision: 1.2 $
$Date: 1997/12/10 13:34:05 $


Table of Contents

Back To Main Manual Page